1. Field of the Invention
This invention relates in general to a read-out circuit for digital storage elements.
2. Description of the Prior Art
The publications entitled "Electronic Design" No. 6 of 15th March 1973 at pages 28 and 29 and the publication "Siemens Forschungs- und Entwicklungsberichten" Vol. 4, 1975, No. 4, pages 197 to 202 and in particular FIG. 2 disclose storage means for digital information which is represented by the presence or absence of an electrical charge in a storage capacitor. Prior to read-out of information the bit line is first brought as a result of a temporary closure of a first switch to a neutral starting potential which is between the potentials that correspond to the two differing digital signals. Subsequently, the bit line is connected generally by way of a switching transistor to the storage capacitor which is to be read out and depending on the storage content a recharging between the storage capacitor and the line capacitance of the bit line is accomplished in one or the other directions. The recharging causes a reduction or a raising of the potential at the input of the first inverting amplifier stage. If the second switch is then closed, the two amplifier stages form a flip-flop circuit which is triggered into one or the other stable state as the result of the change in the potential at the input of the first amplifier stage. The potential at the input of the first stage is then further displaced in the original direction of change so that a signal regeneration occurs at the input of the first amplifier stage. Electrical signals which are inverse to one another and which represent the information to be read out can then be taken from the outputs of the amplifier stages. One of these signals which can also be removed from the bit line is re-entered into the storage capacitor as a regenerated signal before the storage capacitor is cut off from the bit line by the switching transistor.
The prior art read-out circuits of this type do not always fulfill the requisite requirements relative to their sensitivity response and the operating speed. This is because the tolerance dependent differences in the characteristic values of the two inverting amplifier stages cause a potential difference to occur between the output of the second stage and the input of the second stage which causes a jump in potential at the input of the first stage when these circuit points are connected by way of the second switch. As this potential jump is superimposed upon the useful signal fed back by way of the second switch and is an interference signal the onely useful signal switch can be clearly analyzed are those which possess a predetermined signal to noise ratio. Due to the recharging process occurring on the bit line, the useful signal builds up only gradually, however, so that when the second switch is closed and upon the commencement of the feed back action of the flip-flop circuit, it is necessary to wait until the requisite useful signal amplitude is reached.